PCIe 3.0

Innosilicon PCIE 3.0 PHY &控制器controller IP是一种高度可编程的模块,可将高速串行数据处理为与英特尔 PCIE 3.0 超高速标准的 PHY 接口兼容的并行数据。 PHY 支持 PCIE 3.0(8Gb/s/5Gb/s/2.5Gb/s) 物理层规范。

PHY 模块集成l 物理媒体附件 (PMA) 层和物理编码子块 (PCS) 层。

The Innosilicon PCIE3.0 PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interface for PCIE3.0 Super-Speed standard from Intel. The PHY supports PCIE3.0(8Gb/s/5Gb/s/2.5Gb/s) physical layer specifications.


The PHY module includes a top level wrapper integrating both the Physical Media Attachment (PMA) layer, and the Physical Coding Sub-Block (PCS) layer.

KEY FEATURES:

  • Standard PHY interface enables multiple IP sources for PCI

  • Express Logical Layer and provides a target interface for PCI

  • Express PHY vendors.

  • Supports 2.5Gb/s only or 2.5Gb/s,5.0Gb/s and 8.0Gb/s serial data transmission rate

  • Utilizes 8-bit, 16-bit or 32- bit parallel interface to transmit and receive PCI Express data

  • Allows integration of high speed components into a single func tional block as seen by the endpoint device designer.

  • Data and clock recovery from serial stream on the PCI Express bus

  • Holding registers to stage transmit and receive data

  • Supports direct disparity control for use in transmitting compliance pattern

  • 8b/10b encode/decode and error indication

  • 128b/130b encode/decode and error indication

  • Receiver detection

  • Beacon transmission and reception

  • Selectable Tx Margining, Tx De-emphasis and signal swing values

  • Receive Equalization training

INNOSILICON ADVANTAGES:

  • As with all Innosilicon IP, the focus is on silicon proven, fully certified solutions providing

  • Small size

  • Low power

  • High ATE coverage

  • Simple integration

  • Flexible customization

BLOCK DIAGRAM:

EXAMPLE APPLICATIONS:

一键启动,简化您的下一个产品设计流程!


联系
我们

定制
需求

ayx爱游戏体育网页登录入口